The stack-gate ETOX-cell, one of the most popular cell structures for flash memories, is widely programmed by channel hot-electron (CHE) and erased by Fowler-Nordheim (FN) tunneling through the source side or the channel area.
The n-channel ETOX-cell is conventionally fabricated by a twin-well process or recently in a triple-well process as shown in FIG. 1. The triple-well structure is typically used to protect cells from noises generated outside the deep n-well by reverse-biasing the deep n-well to p-well junction, e.g., the deep n-well is biased to the highest potential (Vcc) and the p-well is biased to the lowest potential (Vss). The n+ source is typically doubly implanted by As.sup.75 (with a high dose of 3E15/cm.sup.2 .about.1E16/cm.sup.2 for the n+ junction) and P.sup.31 (with a lower dose of .about.1E14cm.sup.2 for the n-junction) so that the source junction can be biased at high voltage (e.g. .about.12 v) during erase operation. The n+ drain is typically implanted by As only with a high dose (.about.1E16/cm.sup.2) and the drain side does not need the lightly-doped-drain (LDD) implant and spacer structure.
Note that the LDD structure is not useful in an ETOX-cell, although it is important in CMOS transistors for reducing electrical field during switching for lower hot-electron generation. The tunnel oxide (T.sub.ox) is typically 80-120 angstroms thick, the inter-poly dielectric (T.sub.pp) typically consists of thin oxide-nitride-oxide (ONO) layers. As an example, a typical ETOX-cell based on 0.35 um CMOS design rule has the following cell parameters: T.sub.ox .about.90 angstroms, T.sub.pp .about.160 angstroms (oxide equivalent thickness), and control-gate to floating-gate coupling ratio of .about.0.8.
The ETOX-cell of FIG. 1 is programmed by channel-hot-electrons (CHE). The bias for programming is typically: V.sub.d =7 v, V.sub.cg =9 to 12 v, and V.sub.s =0 v. Under these bias conditions, there is a large channel current (.about.1 mA/cell) for hot electron generation near the channel surface of the drain. Hot electrons are injected into the floating-gate when the oxide energy barrier is overcome and when assisted by the positive control gate bias. After programming, the amount of net electrons on the floating-gate increases, which results in an increase of the cell threshold voltage (V.sub.T). The electrons in the floating-gate will remain for a long time (e.g. 10 years at room temperature), unless intentionally erased. The drawback of CHE programming is low injection efficiency and large power consumption during programming.
The cell is erased by Fowler-Nordheim (F-N) tunneling through the source side or the channel area. The bias during source side erase is typically: V.sub.d .about.0 v or floating, V.sub.cg .about.-5 v to 0 v, and V.sub.s =+9 to +12 v. This establishes a large electrical field (.about.10 Mv/cm) across the tunnel oxide between the floating-gate and source overlap area. Electrons on the floating-gate will tunnel into the source and be removed away. It is known that there is large gate induced drain leakage (GIDL) current that occurs at the source side during erase as well as the associated degradation of the tunnel oxide.
The bias for F-N erase through the channel area is typically: V.sub.d .about.floating, V.sub.cg .about.15 v, V.sub.pw .about.0 v. A large electrical field (-10 Mv/cm) can be established across the tunnel oxide between the floating-gate and the p-well channel area (in accumulation). Electrons on the floating-gate will tunnel into the channel area and be removed through the p-well bias. It is well known that a high negative voltage is required on the control-gate and the tunnel oxide is easily degraded by the high electrical field during erase.
The read biases of the prior art ETOX-cell are typically: V.sub.d .about.1 v to 2 v, V.sub.cg .about.V.sub.cc, V.sub.s .about.0 v, V.sub.pw .about.0 v, V.sub.dnw =Vcc, and V.sub.sub .about.0 v. The channel may be inverted or not depending on the net electron charge stored on the floating-gate, and results in the on and off of the cell as measured by the read current I.sub.read representing the digital information of "1" or "0" stored in the cell.
The prior art ETOX-cell of FIG. 1 can be programmed by another method known as substrate-hot-electron (SHE) as shown in FIG. 2. As seen in FIG. 2, an additional n+ junction is needed (i.e., the "injection" junction) for injecting electrons through the forward-biased n+ injection junction to p-well junction. Unfortunately, most of the injected electrons are not diffused towards the channel area, but instead toward the nearby n+ source junction. Furthermore, the n+ source, p-well, and the n+ "injection" junction form a lateral npn bipolar transistor. The bipolar action of the npn bipolar transistor results in a large bipolar current at the node of n+ injection junction. Therefore, the SHE program scheme for the ETOX-cell is not only very slow but also requires a large cell size due to the additional "injection" junction. As a result, this type of SHE programming scheme is not popular in commercial EPROMs or ETOX flash memories.
What is needed is a method for manufacturing a flash cell having the advantages of small cell size and easily implemented as an array.